lctr-b2xx: added u-boot patches.
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e707a403cc
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@ -0,0 +1,17 @@
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--- u-boot-2013.01/board/ti/am335x/board.c 2013-01-15 21:47:42.000000000 +0000
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+++ u-boot-2013.01.rasm/board/ti/am335x/board.c 2013-04-09 18:39:45.938442622 +0100
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@@ -73,6 +73,14 @@
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return !strncmp(header.config, "SKU#02", 6);
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}
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+#ifndef CONFIG_SYS_DCACHE_OFF
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+void enable_caches(void)
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+{
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+ /* Enable D-cache. I-cache is already enabled in start.S */
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+ dcache_enable();
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+}
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+#endif
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+
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/*
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* Read header information from EEPROM into global structure.
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*/
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@ -0,0 +1,153 @@
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diff --git a/boards.cfg b/boards.cfg
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index 2128996..0d9abd8 100644
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--- a/boards.cfg
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+++ b/boards.cfg
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@@ -256,6 +256,7 @@ Active arm armv7 am33xx siemens dxr2
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Active arm armv7 am33xx siemens pxm2 pxm2 - Roger Meier <r.meier@siemens.com>
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Active arm armv7 am33xx siemens rut rut - Roger Meier <r.meier@siemens.com>
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Active arm armv7 am33xx ti am335x am335x_boneblack am335x_evm:SERIAL1,CONS_INDEX=1,EMMC_BOOT Tom Rini <trini@ti.com>
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+Active arm armv7 am33xx ti am335x am335x_bbb am335x_bbb:SERIAL1,CONS_INDEX=1 Ricardo Martins <rasm@fe.up.pt>
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Active arm armv7 am33xx ti am335x am335x_evm am335x_evm:SERIAL1,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
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Active arm armv7 am33xx ti am335x am335x_evm_nor am335x_evm:SERIAL1,CONS_INDEX=1,NAND,NOR Tom Rini <trini@ti.com>
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Active arm armv7 am33xx ti am335x am335x_evm_norboot am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT Tom Rini <trini@ti.com>
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diff --git a/include/configs/am335x_bbb.h b/include/configs/am335x_bbb.h
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new file mode 100644
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index 0000000..89c5835
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--- /dev/null
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+++ b/include/configs/am335x_bbb.h
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@@ -0,0 +1,135 @@
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+/*
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+ * am335x_evm.h
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+ *
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+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation version 2.
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+ *
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+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
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+ * kind, whether express or implied; without even the implied warranty
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+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#ifndef __CONFIG_AM335X_EVM_H
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+#define __CONFIG_AM335X_EVM_H
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+
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+#include <configs/ti_am335x_common.h>
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+
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+#ifdef CONFIG_BOOTDELAY
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+# undef CONFIG_BOOTDELAY
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+#endif
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+#define CONFIG_BOOTDELAY 0
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+#define CONFIG_ZERO_BOOTDELAY_CHECK 1
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+
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+#undef CONFIG_BOOTM_NETBSD
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+#undef CONFIG_BOOTM_PLAN9
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+#undef CONFIG_BOOTM_RTEMS
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+#undef CONFIG_BOOTM_VXWORKS
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+#undef CONFIG_BOOTP_DNS
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+#undef CONFIG_BOOTP_DNS2
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+#undef CONFIG_BOOTP_SEND_HOSTNAME
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+#undef CONFIG_CMD_ASKENV
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+#undef CONFIG_CMD_BDI
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+#undef CONFIG_CMD_BOOTD
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+#undef CONFIG_CMD_CRC32
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+#undef CONFIG_CMD_DFU
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+#undef CONFIG_CMD_DHCP
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+#undef CONFIG_CMD_EDITENV
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+#undef CONFIG_CMD_EDITENV
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+#undef CONFIG_CMD_EXPORTENV
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+#undef CONFIG_CMD_FPGA
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+#undef CONFIG_CMD_ITEST
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+#undef CONFIG_CMD_LOADB
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+#undef CONFIG_CMD_LOADS
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+#undef CONFIG_CMD_MEMORY
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+#undef CONFIG_CMD_MISC
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+#undef CONFIG_CMD_NET
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+#undef CONFIG_CMD_NFS
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+#undef CONFIG_CMD_PING
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+#undef CONFIG_CMD_SETGETDCR
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+#undef CONFIG_CMD_SPI
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+#undef CONFIG_DRIVER_TI_CPSW
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+#undef CONFIG_MII
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+#undef CONFIG_MUSB_GADGET
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+#undef CONFIG_MUSB_HOST
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+#undef CONFIG_NAND
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+#undef CONFIG_OMAP3_SPI
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+#undef CONFIG_SPI
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+#undef CONFIG_SPI_BOOT
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+#undef CONFIG_SPL_ETH_SUPPORT
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+#undef CONFIG_SPL_NAND_LOAD
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+#undef CONFIG_SPL_NAND_SUPPORT
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+#undef CONFIG_SPL_SPI_FLASH_SUPPORT
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+#undef CONFIG_SPL_SPI_LOAD
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+#undef CONFIG_SPL_SPI_SUPPORT
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+#undef CONFIG_SPL_YMODEM_SUPPORT
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+#undef CONFIG_SYS_LONGHELP
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+
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+#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
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+#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
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+
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+/* Clock Defines */
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+#define V_OSCK 24000000 /* Clock output from T2 */
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+#define V_SCLK (V_OSCK)
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+
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+/* Custom script for NOR */
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+#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
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+
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+/* Always 128 KiB env size */
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+#define CONFIG_ENV_SIZE (128 << 10)
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+
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+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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+
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+#ifndef CONFIG_SPL_BUILD
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+#define CONFIG_EXTRA_ENV_SETTINGS \
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+ "loadaddr=0x80200000\0" \
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+ "fdtaddr=0x80F80000\0" \
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+ "console=ttyO0,115200n8\0" \
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+ "mmcroot=/dev/mmcblk0p2\0" \
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+ "mmcrootfstype=ext4\0"
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+
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+#define CONFIG_BOOTCOMMAND \
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+ "setenv bootargs \"console=${console} root=${mmcroot} rootfstype=${mmcrootfstype} rootwait ro quiet\"; " \
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+ "mmc dev 0; " \
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+ "ext2load mmc0 0:2 ${loadaddr} /boot/kernel; " \
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+ "ext2load mmc0 0:2 ${fdtaddr} /boot/board.dtb; " \
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+ "bootz ${loadaddr} - ${fdtaddr}; "
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+
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+#endif
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+
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+/* NS16550 Configuration */
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+#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
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+#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
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+#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
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+#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
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+#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
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+#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
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+#define CONFIG_BAUDRATE 115200
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+
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+#define CONFIG_CMD_EEPROM
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+#define CONFIG_ENV_EEPROM_IS_ON_I2C
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+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
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+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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+#define CONFIG_SYS_I2C_MULTI_EEPROMS
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+
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+/* PMIC support */
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+#define CONFIG_POWER_TPS65217
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+#define CONFIG_POWER_TPS65910
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+
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+/* SPL */
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+#define CONFIG_SPL_POWER_SUPPORT
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+
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+
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+/* Bootcount using the RTC block */
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+#define CONFIG_BOOTCOUNT_LIMIT
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+#define CONFIG_BOOTCOUNT_AM33XX
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+
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+/* SPI flash. */
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+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
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+
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+#define CONFIG_ENV_IS_NOWHERE
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+
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+#endif /* ! __CONFIG_AM335X_EVM_H */
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