clean ups
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b599b45bc6
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83c1e58674
@ -653,55 +653,6 @@ LiftedCircuit::shatterCountedLogVarsAux (
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vector<LogVarTypes>
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getAllPossibleTypes (unsigned nrLogVars)
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{
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if (nrLogVars == 0) {
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return {};
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}
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if (nrLogVars == 1) {
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return {{LogVarType::POS_LV},{LogVarType::NEG_LV}};
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}
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vector<LogVarTypes> res;
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Indexer indexer (vector<unsigned> (nrLogVars, 2));
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while (indexer.valid()) {
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LogVarTypes types;
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for (size_t i = 0; i < nrLogVars; i++) {
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if (indexer[i] == 0) {
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types.push_back (LogVarType::POS_LV);
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} else {
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types.push_back (LogVarType::NEG_LV);
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}
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}
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res.push_back (types);
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++ indexer;
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}
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return res;
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}
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bool
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containsTypes (const LogVarTypes& typesA, const LogVarTypes& typesB)
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{
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for (size_t i = 0; i < typesA.size(); i++) {
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if (typesA[i] == LogVarType::FULL_LV) {
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} else if (typesA[i] == LogVarType::POS_LV
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&& typesB[i] == LogVarType::POS_LV) {
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} else if (typesA[i] == LogVarType::NEG_LV
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&& typesB[i] == LogVarType::NEG_LV) {
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} else {
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return false;
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}
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}
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return true;
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}
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LitLvTypesSet
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LiftedCircuit::smoothCircuit (CircuitNode* node)
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{
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@ -828,6 +779,57 @@ LiftedCircuit::createSmoothNode (
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vector<LogVarTypes>
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LiftedCircuit::getAllPossibleTypes (unsigned nrLogVars) const
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{
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if (nrLogVars == 0) {
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return {};
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}
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if (nrLogVars == 1) {
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return {{LogVarType::POS_LV},{LogVarType::NEG_LV}};
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}
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vector<LogVarTypes> res;
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Indexer indexer (vector<unsigned> (nrLogVars, 2));
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while (indexer.valid()) {
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LogVarTypes types;
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for (size_t i = 0; i < nrLogVars; i++) {
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if (indexer[i] == 0) {
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types.push_back (LogVarType::POS_LV);
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} else {
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types.push_back (LogVarType::NEG_LV);
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}
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}
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res.push_back (types);
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++ indexer;
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}
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return res;
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}
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bool
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LiftedCircuit::containsTypes (
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const LogVarTypes& typesA,
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const LogVarTypes& typesB) const
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{
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for (size_t i = 0; i < typesA.size(); i++) {
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if (typesA[i] == LogVarType::FULL_LV) {
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} else if (typesA[i] == LogVarType::POS_LV
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&& typesB[i] == LogVarType::POS_LV) {
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} else if (typesA[i] == LogVarType::NEG_LV
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&& typesB[i] == LogVarType::NEG_LV) {
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} else {
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return false;
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}
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}
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return true;
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}
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CircuitNodeType
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LiftedCircuit::getCircuitNodeType (const CircuitNode* node) const
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{
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@ -221,9 +221,9 @@ class LiftedCircuit
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bool tryUnitPropagation (CircuitNode** follow, Clauses& clauses);
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bool tryIndependence (CircuitNode** follow, Clauses& clauses);
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bool tryIndependence (CircuitNode** follow, Clauses& clauses);
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bool tryShannonDecomp (CircuitNode** follow, Clauses& clauses);
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bool tryShannonDecomp (CircuitNode** follow, Clauses& clauses);
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bool tryInclusionExclusion (CircuitNode** follow, Clauses& clauses);
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@ -247,6 +247,11 @@ class LiftedCircuit
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void createSmoothNode (const LitLvTypesSet& lids,
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CircuitNode** prev);
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vector<LogVarTypes> getAllPossibleTypes (unsigned nrLogVars) const;
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bool containsTypes (const LogVarTypes& typesA,
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const LogVarTypes& typesB) const;
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CircuitNodeType getCircuitNodeType (const CircuitNode* node) const;
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void exportToGraphViz (CircuitNode* node, ofstream&);
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