InxExc: improve the code
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6db4d37684
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@ -341,7 +341,7 @@ LiftedCircuit::tryIndependence (
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while (finish == false) {
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finish = true;
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for (size_t i = 0; i < indepClauses.size(); i++) {
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if (isIndependentClause (indepClauses[i], depClauses) == false) {
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if (independentClause (indepClauses[i], depClauses) == false) {
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depClauses.push_back (indepClauses[i]);
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indepClauses.erase (indepClauses.begin() + i);
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finish = false;
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@ -402,27 +402,40 @@ LiftedCircuit::tryInclusionExclusion (
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CircuitNode** follow,
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Clauses& clauses)
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{
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// TODO compare all subsets with all subsets
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for (size_t i = 0; i < clauses.size(); i++) {
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const Literals& literals = clauses[i].literals();
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for (size_t j = 0; j < literals.size(); j++) {
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bool indep = true;
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for (size_t k = 0; k < literals.size(); k++) {
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LogVarSet intersect = literals[j].logVarSet()
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& literals[k].logVarSet();
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if (j != k && intersect.empty() == false) {
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indep = false;
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Literals depLits = { clauses[i].literals().front() };
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Literals indepLits (clauses[i].literals().begin() + 1,
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clauses[i].literals().end());
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bool finish = false;
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while (finish == false) {
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finish = true;
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for (size_t j = 0; j < indepLits.size(); j++) {
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if (independentLiteral (indepLits[j], depLits) == false) {
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depLits.push_back (indepLits[j]);
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indepLits.erase (indepLits.begin() + j);
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finish = false;
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break;
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}
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}
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if (indep) {
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}
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if (indepLits.empty() == false) {
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// TODO this should be have to be count normalized too
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ConstraintTree really = clauses[i].constr();
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Clause c1 (really.projectedCopy (
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literals[j].logVars()));
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c1.addLiteral (literals[j]);
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Clause c2 = clauses[i];
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c2.removeLiteral (j);
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LogVarSet lvs1;
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for (size_t j = 0; j < depLits.size(); j++) {
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lvs1 |= depLits[j].logVarSet();
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}
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LogVarSet lvs2;
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for (size_t j = 0; j < indepLits.size(); j++) {
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lvs2 |= indepLits[j].logVarSet();
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}
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Clause c1 (clauses[i].constr().projectedCopy (lvs1));
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for (size_t j = 0; j < depLits.size(); j++) {
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c1.addLiteral (depLits[j]);
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}
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Clause c2 (clauses[i].constr().projectedCopy (lvs2));
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for (size_t j = 0; j < indepLits.size(); j++) {
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c2.addLiteral (indepLits[j]);
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}
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Clauses plus1Clauses = clauses;
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Clauses plus2Clauses = clauses;
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Clauses minusClauses = clauses;
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@ -433,7 +446,9 @@ LiftedCircuit::tryInclusionExclusion (
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plus2Clauses.push_back (c2);
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minusClauses.push_back (c1);
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minusClauses.push_back (c2);
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IncExcNode* ieNode = new IncExcNode (clauses);
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stringstream explanation;
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explanation << " IncExc on clause nº " << i + 1;
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IncExcNode* ieNode = new IncExcNode (clauses, explanation.str());
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compile (ieNode->plus1Branch(), plus1Clauses);
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compile (ieNode->plus2Branch(), plus2Clauses);
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compile (ieNode->minusBranch(), minusClauses);
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@ -441,7 +456,6 @@ LiftedCircuit::tryInclusionExclusion (
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return true;
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}
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}
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}
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return false;
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}
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@ -651,7 +665,7 @@ LiftedCircuit::shatterCountedLogVarsAux (
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bool
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LiftedCircuit::isIndependentClause (
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LiftedCircuit::independentClause (
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Clause& clause,
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Clauses& otherClauses) const
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{
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@ -665,6 +679,22 @@ LiftedCircuit::isIndependentClause (
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bool
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LiftedCircuit::independentLiteral (
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const Literal& lit,
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const Literals& otherLits) const
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{
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for (size_t i = 0; i < otherLits.size(); i++) {
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if (lit.lid() == otherLits[i].lid()
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|| (lit.logVarSet() & otherLits[i].logVarSet()).empty() == false) {
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return false;
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}
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}
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return true;
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}
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LitLvTypesSet
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LiftedCircuit::smoothCircuit (CircuitNode* node)
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{
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@ -882,7 +912,7 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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ss << "n" << nrAuxNodes;
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string auxNode = ss.str();
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nrAuxNodes ++;
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string opStyle = "shape=circle,width=0.7,margin=\"0.0,0.0\"," ;
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switch (getCircuitNodeType (node)) {
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@ -890,7 +920,7 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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OrNode* casted = dynamic_cast<OrNode*>(node);
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printClauses (casted, os);
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os << auxNode << " [label=\"∨\"]" << endl;
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os << auxNode << " [" << opStyle << "label=\"∨\"]" << endl;
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os << escapeNode (node) << " -> " << auxNode;
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os << " [label=\"" << node->explanation() << "\"]" ;
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os << endl;
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@ -914,7 +944,7 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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AndNode* casted = dynamic_cast<AndNode*>(node);
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printClauses (casted, os);
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os << auxNode << " [label=\"∧\"]" << endl;
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os << auxNode << " [" << opStyle << "label=\"∧\"]" << endl;
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os << escapeNode (node) << " -> " << auxNode;
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os << " [label=\"" << node->explanation() << "\"]" ;
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os << endl;
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@ -938,7 +968,7 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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SetOrNode* casted = dynamic_cast<SetOrNode*>(node);
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printClauses (casted, os);
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os << auxNode << " [label=\"∨(X)\"]" << endl;
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os << auxNode << " [" << opStyle << "label=\"∨(X)\"]" << endl;
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os << escapeNode (node) << " -> " << auxNode;
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os << " [label=\"" << node->explanation() << "\"]" ;
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os << endl;
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@ -956,7 +986,7 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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SetAndNode* casted = dynamic_cast<SetAndNode*>(node);
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printClauses (casted, os);
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os << auxNode << " [label=\"∧(X)\"]" << endl;
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os << auxNode << " [" << opStyle << "label=\"∧(X)\"]" << endl;
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os << escapeNode (node) << " -> " << auxNode;
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os << " [label=\"" << node->explanation() << "\"]" ;
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os << endl;
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@ -974,7 +1004,8 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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IncExcNode* casted = dynamic_cast<IncExcNode*>(node);
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printClauses (casted, os);
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os << auxNode << " [label=\"IncExc\"]" << endl;
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os << auxNode << " [" << opStyle << "label=\"+ - +\"]" ;
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os << endl;
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os << escapeNode (node) << " -> " << auxNode;
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os << " [label=\"" << node->explanation() << "\"]" ;
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os << endl;
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@ -985,13 +1016,13 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
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os << endl;
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os << auxNode << " -> " ;
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os << escapeNode (*casted->plus2Branch());
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os << " [label=\" " << (*casted->plus2Branch())->weight() << "\"]" ;
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os << escapeNode (*casted->minusBranch()) << endl;
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os << " [label=\" " << (*casted->minusBranch())->weight() << "\"]" ;
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os << endl;
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os << auxNode << " -> " ;
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os << escapeNode (*casted->minusBranch()) << endl;
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os << " [label=\" " << (*casted->minusBranch())->weight() << "\"]" ;
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os << escapeNode (*casted->plus2Branch());
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os << " [label=\" " << (*casted->plus2Branch())->weight() << "\"]" ;
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os << endl;
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exportToGraphViz (*casted->plus1Branch(), os);
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@ -139,8 +139,8 @@ class SetAndNode : public CircuitNode
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class IncExcNode : public CircuitNode
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{
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public:
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IncExcNode (const Clauses& clauses)
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: CircuitNode (clauses), plus1Branch_(0),
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IncExcNode (const Clauses& clauses, string explanation)
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: CircuitNode (clauses, explanation), plus1Branch_(0),
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plus2Branch_(0), minusBranch_(0) { }
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CircuitNode** plus1Branch (void) { return &plus1Branch_; }
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@ -198,7 +198,8 @@ class TrueNode : public CircuitNode
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class CompilationFailedNode : public CircuitNode
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{
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public:
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CompilationFailedNode (const Clauses& clauses) : CircuitNode (clauses) { }
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CompilationFailedNode (const Clauses& clauses)
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: CircuitNode (clauses) { }
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double weight (void) const;
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};
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@ -243,7 +244,10 @@ class LiftedCircuit
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bool shatterCountedLogVarsAux (Clauses& clauses, size_t idx1, size_t idx2);
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bool isIndependentClause (Clause& clause, Clauses& otherClauses) const;
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bool independentClause (Clause& clause, Clauses& otherClauses) const;
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bool independentLiteral (const Literal& lit,
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const Literals& otherLits) const;
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LitLvTypesSet smoothCircuit (CircuitNode* node);
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@ -377,22 +377,24 @@ LiftedWCNF::LiftedWCNF (const ParfactorList& pfList)
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*/
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Literal lit1 (0, {0});
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Literal lit2 (1, {});
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Literal lit3 (2, {});
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Literal lit4 (3, {});
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Literal lit2 (1, {0});
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Literal lit3 (2, {1});
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Literal lit4 (3, {1});
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vector<vector<string>> names = {{"p1"},{"p2"}};
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vector<vector<string>> names = {{"p1","p2"},{"p3","p4"}};
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Clause c1 (names);
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c1.addLiteral (lit1);
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c1.addLiteral (lit2);
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c1.addPosCountedLogVar (0);
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c1.addLiteral (lit3);
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c1.addLiteral (lit4);
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//c1.addPosCountedLogVar (0);
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clauses_.push_back (c1);
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Clause c2 (names);
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c2.addLiteral (lit1);
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c2.addLiteral (lit3);
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c2.addNegCountedLogVar (0);
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clauses_.push_back (c2);
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//clauses_.push_back (c2);
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/*
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Clause c3;
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c3.addLiteral (lit3);
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