improments in exportToGraphViz

This commit is contained in:
Tiago Gomes 2012-10-29 13:49:11 +00:00
parent d074ca9a8f
commit fbc44ba17d

View File

@ -511,10 +511,12 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
{ {
assert (node != 0); assert (node != 0);
static unsigned nrOrNodes = 0; static unsigned nrAuxNodes = 0;
static unsigned nrAndNodes = 0; stringstream ss;
static unsigned nrSetOrNodes = 0; ss << "n" << nrAuxNodes;
static unsigned nrSetAndNodes = 0; string auxNode = ss.str();
nrAuxNodes ++;
switch (getCircuitNodeType (node)) { switch (getCircuitNodeType (node)) {
@ -530,14 +532,13 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
os << "\"]" ; os << "\"]" ;
os << endl; os << endl;
} }
os << "or" << nrOrNodes << " [label=\"\"]" << endl; os << auxNode << " [label=\"\"]" << endl;
os << '"' << node << '"' << " -> " << "or" << nrOrNodes; os << escapeNode (node) << " -> " << auxNode;
os << " [label=\"" << node->explanation() << "\"]" << endl; os << " [label=\"" << node->explanation() << "\"]" << endl;
os << "or" << nrOrNodes << " -> " ; os << auxNode << " -> " ;
os << escapeNode (*casted->leftBranch()) << endl; os << escapeNode (*casted->leftBranch()) << endl;
os << "or" << nrOrNodes << " -> " ; os << auxNode << " -> " ;
os << escapeNode (*casted->rightBranch()) << endl; os << escapeNode (*casted->rightBranch()) << endl;
nrOrNodes ++;
exportToGraphViz (*casted->leftBranch(), os); exportToGraphViz (*casted->leftBranch(), os);
exportToGraphViz (*casted->rightBranch(), os); exportToGraphViz (*casted->rightBranch(), os);
break; break;
@ -553,21 +554,19 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
} }
os << "\"]" ; os << "\"]" ;
os << endl; os << endl;
os << "and" << nrAndNodes << " [label=\"\"]" << endl; os << auxNode << " [label=\"\"]" << endl;
os << '"' << node << '"' << " -> " << "and" << nrAndNodes; os << escapeNode (node) << " -> " << auxNode;
os << " [label=\"" << node->explanation() << "\"]" << endl; os << " [label=\"" << node->explanation() << "\"]" << endl;
os << "and" << nrAndNodes << " -> " ; os << auxNode << " -> " ;
os << escapeNode (*casted->leftBranch()) << endl; os << escapeNode (*casted->leftBranch()) << endl;
os << "and" << nrAndNodes << " -> " ; os << auxNode << " -> " ;
os << escapeNode (*casted->rightBranch()) << endl; os << escapeNode (*casted->rightBranch()) << endl;
nrAndNodes ++;
exportToGraphViz (*casted->leftBranch(), os); exportToGraphViz (*casted->leftBranch(), os);
exportToGraphViz (*casted->rightBranch(), os); exportToGraphViz (*casted->rightBranch(), os);
break; break;
} }
case SET_OR_NODE: { case SET_OR_NODE: {
nrSetOrNodes ++;
assert (false); // not yet implemented assert (false); // not yet implemented
} }
@ -581,12 +580,11 @@ LiftedCircuit::exportToGraphViz (CircuitNode* node, ofstream& os)
} }
os << "\"]" ; os << "\"]" ;
os << endl; os << endl;
os << "setand" << nrSetAndNodes << " [label=\"∧(X)\"]" << endl; os << auxNode << " [label=\"∧(X)\"]" << endl;
os << '"' << node << '"' << " -> " << "setand" << nrSetAndNodes; os << escapeNode (node) << " -> " << auxNode;
os << " [label=\"" << node->explanation() << "\"]" << endl; os << " [label=\"" << node->explanation() << "\"]" << endl;
os << "setand" << nrSetAndNodes << " -> " ; os << auxNode << " -> " ;
os << escapeNode (*casted->follow()) << endl; os << escapeNode (*casted->follow()) << endl;
nrSetAndNodes ++;
exportToGraphViz (*casted->follow(), os); exportToGraphViz (*casted->follow(), os);
break; break;
} }