lctr-a9xx: moved pinmux initialization of pins without a kernel driver to u-boot.

This commit is contained in:
Ricardo Martins 2014-08-14 14:27:39 +01:00
parent 7d4b8f71c9
commit 489ddb9119
2 changed files with 15 additions and 30 deletions

View File

@ -12,7 +12,7 @@ diff -Nru linux-3.13.1/arch/arm/boot/dts/Makefile linux-3.13.1.rasm/arch/arm/boo
diff -Nru linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts linux-3.13.1.rasm/arch/arm/boot/dts/omap3-lctr-a9xx.dts
--- linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts 1970-01-01 01:00:00.000000000 +0100
+++ linux-3.13.1.rasm/arch/arm/boot/dts/omap3-lctr-a9xx.dts 2014-02-01 23:49:40.019073833 +0000
@@ -0,0 +1,103 @@
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2014 Universidade do Porto - Faculdade de Engenharia
+ *
@ -68,20 +68,6 @@ diff -Nru linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts linux-3.13.1.rasm/a
+};
+
+&omap3_pmx_core {
+ pinctrl-names = "default", "board";
+ pinctrl-0 = <&hsusbb1_pins &board_pins>;
+
+ board_pins: pinmux_board_pins {
+ pinctrl-single,pins = <
+ /* gpio_133 - panel backlight */
+ 0x130 (PIN_OUTPUT | MUX_MODE4)
+ /* gpio_135 - panel LED */
+ 0x132 (PIN_OUTPUT | MUX_MODE4)
+ /* gpio_157 - transducer */
+ 0x15e (PIN_INPUT_PULLUP | MUX_MODE4)
+ >;
+ };
+
+ gpio_keys_pins: pinmux_gpio_keys_pins {
+ pinctrl-single,pins = <
+ 0x136 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpio_137 - button 2 */

View File

@ -1,29 +1,28 @@
diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h
index 181f81f..d1320a1 100644
index 181f81f..fe643e4 100644
--- a/board/isee/igep00x0/igep00x0.h
+++ b/board/isee/igep00x0/igep00x0.h
@@ -131,6 +131,10 @@ static void setup_net_chip(void);
MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\
MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\
MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\
@@ -146,7 +146,19 @@ static void setup_net_chip(void);
MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\
MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */
+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */\
+ MUX_VAL(CP(UART1_RTS), (IEN | PTD | DIS | M4)) /* UART1_RTS */\
+ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /* UART1_CTS */\
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */\
MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\
MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\
@@ -145,6 +149,10 @@ static void setup_net_chip(void);
MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /* GPIO_6 */\
MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\
MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\
+ MUX_VAL(CP(MMC2_DAT1), (IDIS | PTD | DIS | M4)) /* GPIO_133 */\
+ MUX_VAL(CP(MMC2_DAT3), (IDIS | PTD | DIS | M4)) /* GPIO_135 */\
+ MUX_VAL(CP(MCBSP1_FSR), (IEN | PTD | DIS | M4)) /* GPIO_157 */\
+ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /* McBSP2_FSX */\
+ MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /* McBSP2_CLKX */\
+ MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /* McBSP2_DR */\
+ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /* McBSP2_DX */\
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\
MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */
+ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /* McBSP2_DX */
+
#endif
#define MUX_IGEP0020() \
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 79daabd..f1b5bb1 100644
--- a/include/configs/omap3_igep00x0.h