lctr-a9xx: moved pinmux initialization of pins without a kernel driver to u-boot.
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@ -12,7 +12,7 @@ diff -Nru linux-3.13.1/arch/arm/boot/dts/Makefile linux-3.13.1.rasm/arch/arm/boo
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diff -Nru linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts linux-3.13.1.rasm/arch/arm/boot/dts/omap3-lctr-a9xx.dts
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--- linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts 1970-01-01 01:00:00.000000000 +0100
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+++ linux-3.13.1.rasm/arch/arm/boot/dts/omap3-lctr-a9xx.dts 2014-02-01 23:49:40.019073833 +0000
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@@ -0,0 +1,103 @@
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@@ -0,0 +1,89 @@
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+/*
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+ * Copyright (C) 2014 Universidade do Porto - Faculdade de Engenharia
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+ *
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@ -68,20 +68,6 @@ diff -Nru linux-3.13.1/arch/arm/boot/dts/omap3-lctr-a9xx.dts linux-3.13.1.rasm/a
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+};
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+
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+&omap3_pmx_core {
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+ pinctrl-names = "default", "board";
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+ pinctrl-0 = <&hsusbb1_pins &board_pins>;
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+
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+ board_pins: pinmux_board_pins {
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+ pinctrl-single,pins = <
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+ /* gpio_133 - panel backlight */
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+ 0x130 (PIN_OUTPUT | MUX_MODE4)
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+ /* gpio_135 - panel LED */
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+ 0x132 (PIN_OUTPUT | MUX_MODE4)
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+ /* gpio_157 - transducer */
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+ 0x15e (PIN_INPUT_PULLUP | MUX_MODE4)
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+ >;
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+ };
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+
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+ gpio_keys_pins: pinmux_gpio_keys_pins {
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+ pinctrl-single,pins = <
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+ 0x136 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpio_137 - button 2 */
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@ -1,29 +1,28 @@
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diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h
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index 181f81f..d1320a1 100644
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index 181f81f..fe643e4 100644
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--- a/board/isee/igep00x0/igep00x0.h
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+++ b/board/isee/igep00x0/igep00x0.h
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@@ -131,6 +131,10 @@ static void setup_net_chip(void);
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MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\
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MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\
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MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\
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@@ -146,7 +146,19 @@ static void setup_net_chip(void);
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MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\
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MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\
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MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\
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- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */
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+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\
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+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */\
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+ MUX_VAL(CP(UART1_RTS), (IEN | PTD | DIS | M4)) /* UART1_RTS */\
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+ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /* UART1_CTS */\
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+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */\
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MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\
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MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\
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MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\
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@@ -145,6 +149,10 @@ static void setup_net_chip(void);
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MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /* GPIO_6 */\
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MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\
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MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\
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+ MUX_VAL(CP(MMC2_DAT1), (IDIS | PTD | DIS | M4)) /* GPIO_133 */\
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+ MUX_VAL(CP(MMC2_DAT3), (IDIS | PTD | DIS | M4)) /* GPIO_135 */\
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+ MUX_VAL(CP(MCBSP1_FSR), (IEN | PTD | DIS | M4)) /* GPIO_157 */\
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+ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /* McBSP2_FSX */\
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+ MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /* McBSP2_CLKX */\
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+ MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /* McBSP2_DR */\
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+ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /* McBSP2_DX */\
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MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\
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MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */
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+ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /* McBSP2_DX */
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+
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#endif
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#define MUX_IGEP0020() \
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diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
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index 79daabd..f1b5bb1 100644
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--- a/include/configs/omap3_igep00x0.h
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